Key publications are highlighted
Journals
J21. V.I. Kelefouras, Keramidas Georgios, ‘Design and Implementation of 2D Convolution on x86/x64 Processors’, IEEE Transactions on Parallel and Distributed Systems, 2022.
J20. V.I. Kelefouras, Karim Djemame, Keramidas Georgios, Voros Nikolaos, ‘A methodology for efficient tile size selection for affine loop kernels’, International Journal of Parallel Programming, Springer, 2022.
J19. Mporas I, Perikos I, Kelefouras V & Paraskevas M, 'Illegal Logging Detection Based on Acoustic Surveillance of Forest' Applied Sciences 10, 2020, (20) 7379-7379
J18. Vasilios Kelefouras, Karim Djemame, "A methodology correlating code optimizations with data memory accesses, execution time and energy consumption", accepted for publication in journal of Supercomputing (Springer) (IF: 1.532)
J17. V.I. Kelefouras, Keramidas Georgios, Voros Nikolaos, "Combining software cache partitioning and loop tiling for effective shared cache management", ACM Transactions on Embedded Computing Systems (TECS) (IF: 1.367)
J16. V.I. Kelefouras, “A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details", Journal of Computing, Springer (IF: 0.872)
J15. V.I. Kelefouras, A. Kritikakou, I. Mporas and V. Kolonias, “A high performance Matrix-Matrix Multiplication methodology for CPU and GPU architectures”, Journal of Supercomputing, Springer (IF: 1.088)
J14. A.Kritikakou, F. Catthoor, V. Kelefouras and C. Goutis, “Array Size Computation under Uniform Overlapping & Irregular Accesses” ACM Transactions on Design Automation of Electronic Systems (TODAES) (IF: 0.52)
J13. V.I. Kelefouras, Elissavet Papadima, A. S. Kritikakou and C.E. Goutis, «A Matrix Vector Multiplication Methodology for single/multi-core architectures», Journal of Supercomputing, Springer (IF: 1.088)
J12. V.I. Kelefouras, A.Kritikakou and C. Goutis, « A methodology of speeding up loop kernels by exploiting the software information and the memory architecture», Journal of Computer Languages, Systems & Structures (COMLAN), Elsevier, 2015 (IF: 0.458)
J11. H.E. Michail, G.S. Athanasiou, V.I. Kelefouras, G. Theodoridis, T. Stouraitis, C.E. Goutis, “Area-Throughput trade-offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs” Journal of Circuits, Systems, and Computers (IF: 0.25)
J10. V.I. Kelefouras, A. Kritikakou and C. Goutis «A Matrix Matrix Multiplication Methodology for Single/Multi-core architectures using SIMD», Journal of Supercomputing, Springer, Vol. 68, No. 3, pp. 1418-1440, Jan., 2014 (IF: 0.917)
J9. V.I. Kelefouras, A. Kritikakou and C. Goutis «A Methodology for Speeding Up Edge and Line Detection Algorithms focusing on Memory Architecture Utilization», Journal of Supercomputing, Springer, Vol. 68, No. 1, pp. 459-487, 2014, DOI:10.1007/s11227-013-1049-x, (IF: 0.917)
J8. A.Kritikakou, F. Catthoor, V.I. Kelefouras and C. Goutis, «A scalable and near-optimal representation of access schemes for memory management», ACM Transactions on Architecture and code Optimization (TACO), Vol. 11, No.1, Feb., 2014 (IF: 0.824)
J7. A.Kritikakou, F. Catthoor, V.I. Kelefouras and C. Goutis, «Near-optimal & Scalable Intra-signal In-place for Non-overlapping & Irregular Access Schemes», ACM Transactions on Design Automation of Electronic Systems, Vol.19, no. 1, Dec., 2013, DOI:10.1145/2534383 (IF: 0.685)
J6. V.I. Kelefouras, A.Kritikakou, Konstantinos Siourounis and C. Goutis, “A methodology for speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices”, Journal of Signal Processing Systems, Springer, Vol. 77, No. 3, pp. 1-15 , 2013, DOI:10.1007/s11265-013-0812-9 (IF: 0.551)
J5. A.Kritikakou, F. Catthoor, G.S. Athanasiou, V.I. Kelefouras and C. Goutis, “Near-optimal Microprocessor & Accelerators Co-Design with Latency & Throughput Constraints”, ACM Transactions on Architecture and Code Optimization (TACO), May, Vol. 10, No. 2, 2013, DOI:10.1145/2459316.2459317 (IF: 0.824)
J4. A.Kritikakou, F. Catthoor, V.I. Kelefouras and C. Goutis, “A systematic approach to classify design-time global scheduling techniques”, Journal of ACM Computed Surveys, Vol. 45, No. 2, Feb. 2013, DOI: 10.1145/2431211.2431213 (IF: 9.169)
J3. N. Alachiotis, V.I. Kelefouras, G. Athanasiou, H. Michail, A. Kritikakou and C. Goutis, “A Data Locality Methodology for Matrix-Matrix Multiplication Algorithm”, Journal of Supercomputing, Springer, 2012, Vol. 59, No. 2, pp. 830--851, DOI: 10.1007/s11227-010-0474-3 (IF:0.917)
J2. H.E. Michail, G.S. Athanasiou, V.I. Kelefouras, G. Theodoridis, C.E. Goutis, “On the exploitation of a high-throughput SHA-256 FPGA design for HMAC”, accepted for publishing in journal of ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 5, Iss. 1, March 2012.
J1. V.I. Kelefouras, G.S. Athanasiou, N. Alachiotis, H. E. Michail, A. S. Kritikakou and C.E. Goutis, “A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization”, IEEE Transactions on Signal Processing, 2011, Vol.59, No 12, pp.6217-6226, DOI:10.1109/TSP.2011.2168525 (IF:2.829)
Articles
Kelefouras V & Keramidas G (2022) 'Design and Implementation of 2D Convolution on x86/x64 Processors' IEEE Transactions on Parallel and Distributed Systems ,
DOI Open access
Mporas I, Perikos I, Kelefouras V & Paraskevas M (2020) 'Illegal Logging Detection Based on Acoustic Surveillance of Forest' Applied Sciences 10, (20) 7379-7379 Publisher Site ,
DOI Open access
Kelefouras V & Djemame K (2019) 'A methodology correlating code optimizations with data memory accesses, execution time and energy consumption' Journal of Supercomputing ,
DOI Open access
Vasilios K, Georgios K & Nikolaos V (2018) 'Combining Software Cache Partitioning and Loop Tiling for Effective Shared Cache Management' ACM Transactions on Embedded Computing Systems 17, (3) 1-25 ,
DOI Open access
Kelefouras V (2017) 'A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details' Computing 99, (9) 865-888 ,
DOI Open access
Kritikakou A, Catthoor F, Kelefouras V & Goutis C (2016) 'Array Size Computation under Uniform Overlapping and Irregular Accesses' ACM Transactions on Design Automation of Electronic Systems 21, (2) 1-35 ,
DOI
Kelefouras V, Kritikakou A, Mporas I & Kolonias V (2016) 'A high-performance matrix–matrix multiplication methodology for CPU and GPU architectures' The Journal of Supercomputing 72, (3) 804-844 ,
DOI
Michail HE, Athanasiou GS, Kelefouras VI, Theodoridis G, Stouraitis T & Goutis CE (2015) 'Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions’ Pipelined Designs' Journal of Circuits, Systems, and Computers 25, (04) 1650032-1650032 ,
DOI Open access
Kelefouras V, Kritikakou A & Goutis C (2015) 'A methodology for speeding up loop kernels by exploiting the software information and the memory architecture' Computer Languages, Systems & Structures 41, 21-41 ,
DOI
Kelefouras V, Kritikakou A, Papadima E & Goutis C (2015) 'A methodology for speeding up matrix vector multiplication for single/multi-core architectures' The Journal of Supercomputing 71, (7) 2644-2667 ,
DOI
Kritikakou A, Catthoor F, Kelefouras V & Goutis C (2014) 'A scalable and near-optimal representation of access schemes for memory management' ACM Transactions on Architecture and Code Optimization 11, (1) 1-25 ,
DOI
Kelefouras V, Kritikakou A & Goutis C (2014) 'A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD' The Journal of Supercomputing 68, (3) 1418-1440 ,
DOI
Kelefouras V, Kritikakou A & Goutis C (2013) 'A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization' The Journal of Supercomputing 68, (1) 459-487 ,
DOI
Kritikakou A, Catthoor F, Kelefouras V & Goutis C (2013) 'Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes' ACM Transactions on Design Automation of Electronic Systems 19, (1) 1-30 ,
DOI
Kelefouras VI, Kritikakou AS, Siourounis K & Goutis CE (2013) 'A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices' Journal of Signal Processing Systems 77, (3) 241-255 ,
DOI
Kritikakou A, Catthoor F, Athanasiou GS, Kelefouras V & Goutis C (2013) 'Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints' ACM Transactions on Architecture and Code Optimization 10, (2) 1-25 ,
DOI
Kritikakou A, Catthoor F, Kelefouras V & Goutis C (2013) 'A systematic approach to classify design-time global scheduling techniques' ACM Computing Surveys 45, (2) 1-30 ,
DOI
Michail HE, Athanasiou GS, Kelefouras V, Theodoridis G & Goutis CE (2012) 'On the exploitation of a high-throughput SHA-256 FPGA design for HMAC' ACM Transactions on Reconfigurable Technology and Systems 5, (1) 1-28 ,
DOI
Kelefouras VI, Athanasiou GS, Alachiotis N, Michail HE, Kritikakou AS & Goutis CE (2011) 'A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization' IEEE Transactions on Signal Processing 59, (12) 6217-6226 ,
DOI
Alachiotis N, Kelefouras VI, Athanasiou GS, Michail HE, Kritikakou AS & Goutis CE (2010) 'A data locality methodology for matrix–matrix multiplication algorithm' The Journal of Supercomputing 59, (2) 830-851 ,
DOI
Kelefouras V, Djemame K, Keramidas G & Voros N 'A methodology for efficient tile size selection for
affine loop kernels' International Journal of Parallel Programming Open access
Conference Papers
C15. Fahad Siddiqui, Rafiullah Khan, Kieran McLaughlin, Sakir Sezer, Leonard Masing, Tobias Dörr, Florian Schade, Jürgen Becker, Alexander Ahlbrecht, Wanja Zaeske, Umut Durak, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Geza Nemeth, Victor Morales, Paco Gomez, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Vasilios Kelefouras, Konstantinos Antonopoulos, Nikolaos Voros, Christos Panagiotou, Dimitris Karadimas, ‘XANDAR: A holistic Cybersecurity Engineering Process for Safety-critical and Cyber-physical Systems’, 2022 IEEE 95th Vehicular Technology Conference (VTC2022-Spring)
C14. K. Djemame, D. Datsev, Vasilios Kelefouras. Evaluation of Language Runtimes in Open-Source Serverless Platforms. 12th International Conference on Cloud Computing and Services Science (CLOSER 2022), 27-29 April 2022
C13. Vasilios Kelefouras, Karim Djemame, Georgios Keramidas, Nikolaos Voros. An analytical model for loop tiling transformation. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXI), July 5-7, 2021
C12. J. Becker, L. Masing, T. Dörr, F. Schade, G. Keramidas, C. Antonopoulos, M. Mavropoulos, E. Tiganourias, V. Kelefouras, K. Antonopoulos, N. Voros, U. Durak, A. Ahlbrecht, W. Zaeske, C. Panagiotou, D. Karadimas, N. Adler, A. Sailer, R. Weber, T. Wilhelm, F. Oszwald, D. Reinhardt, M. Chamas, A. Bekan, G. Smethurst, F. Siddiqui, R. Khan, V. Garousi, S. Sezer, V. Morales. XANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time
Embedded Software Systems. Accepted for Publication in International Conference on Field-Programmable Logic and Applications (FPL), 2021.
C11. Efstratios Tiganourias, Michail Mavropoulos, Georgios Keramidas, Vasilios Kelefouras, Christos P. Antonopoulos, and Nikolaos Voros. A Hierarchical Profiler of Intermediate Representation Code based on LLVM. Proc. of Mediterranean Conference on Embedded Computing (MECO), 2021
C10. Muna Al-Saadi, Asiya Khan, Vasilios Kelefouras, David J. Walker and Bushra Al-Saadi, Unsupervised Machine Learning-based Elephant and Mice Flow Identification, at Computing Conference 2021, 15-16 July 2021
C9. V.I. Kelefouras, Karim Djemame “Workflow Simulation Aware and Multi-Threading Effective Task Scheduling for Heterogeneous Computing”, 25th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC 18)
C8. V.I. Kelefouras, K. Djemame “A methodology for efficient code optimizations and memory management”, ACM International Conference on Computing Frontiers 2018 (CF '18), Ischia, Italy
C7. V.I. Kelefouras, Keramidas Georgios, Voros Nikolaos “Cache partitioning + loop tiling: A methodology for effective shared cache management”, IEEE Computer Society Annual Symposium on VLSI, July 3-5, 2017, Bochum, Germany
C6. B A.Emeretlis, V. Kelefouras, G. Theodoridis, , M. Nanou, C.(T.) Politi, K. Georgoulakis, and G.O. Glentis, “FPGA IMPLEMENTATION OF A MIMO DFE IN 40 GB/S DQPSK OPTICAL LINKS”, EUSIPCO 2015, NICE, FRANCE.
C5. A.Kritikakou, F. Catthoor, V.I. Kelefouras and C. Goutis, «Near-optimal & Scalable Representation of Access Schemes for Memory Management», Presentation at the Conference of European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC), Amsterdam, The Netherlands, Jan., 2015
C4. Andreas Emeretlis, V. I. Kelefouras, George Theodoridis, George - Othon Glentis, “EFFICIENT FPGA IMPLEMENTATIONS OF VOLTERRA DFES FOR OPTICAL SYSTEMS”, 2014 IEEE Dallas Circuits and Systems Conference (DCAS), Oct 12-13, 2014
C3. Kritikakou, F.Catthoor, G.S. Athanasiou, V.I. Kelefouras and C. Goutis, “A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design”, Proc. Int’l Conf. Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Samos, Greece, 16-19 July 2012
C2. H.E. Michail, V.I. Kelefouras, D. Panagianopoulou, A. Gregoriades, A. Kotsiolis, C.E. Goutis, “HW/SW co-Design Integrating High – Speed Authentication Module for IPSec/IPv6”, Oral Presentation in the fifth International Conference on Digital Telecommunications (ICDT 2010), Athens/Glyfada Greece, 13-19 June 2010
C1. H.E. Michail, D.A. Apostolopoulou, L.A. Anastasiou, V.K. Porpodas, G.S. Athanasiou, V.I. Kelefouras and C.E. Goutis, “Novel Hardware Implementation of the Cipher Message Authentication Code (CMAC)”, Oral Presentation in 1st Panhellenic Conference on Electronics and Telecommunications (PACET '08), Patras, Greece, 20-22 March
Djemame K, Datsev D & Kelefouras V (2022) 'Evaluation of language runtimes in open-source serverless platforms' 12th International Conference on Cloud Computing and Services Science
Becker J, Masing L, Dorr T, Schade F, Keramidas G, Antonopoulos CP, Mavropoulos M, Tiganourias E, Kelefouras V & Antonopoulos K (2021) 'XANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time Embedded Software Systems' 2021 31st International Conference on Field-Programmable Logic and Applications (FPL) 8-/-0/20219-/-0/2021IEEE ,
DOI
Tiganourias E, Mavropoulos M, Keramidas G, Kelefouras V, Antonopoulos CP & Voros N (2021) 'A Hierarchical Profiler of Intermediate Representation Code based on LLVM' 2021 10th Mediterranean Conference on Embedded Computing (MECO) 6-/-0/20216-/-0/2021IEEE ,
DOI Open access
Al-Saadi M, Khan A, Kelefouras V, Walker DJ & Al-Saadi B (2021) 'Unsupervised Machine Learning-Based Elephant and Mice Flow Identification' Springer International Publishing 357-370 ,
DOI
Kelefouras V & Djemame K (2018) 'Workflow Simulation Aware and Multi-Threading Effective Task Scheduling for Heterogeneous Computing' 25th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC) Bengaluru, India 2-/-1/20182-/-1/2018,
DOI Open access
Kelefouras V & Djemame K (2018) 'A methodology for efficient code optimizations and memory management' ACM International Conference on Computing Frontiers 2018 (CF '18) Ischia, Italy ,
DOI Open access
Kelefouras V, Keramidas G & Voros N (2017) 'Cache partitioning + loop tiling: A methodology for effective shared cache management”' IEEE Computer Society Annual Symposium on VLSI Bochum, Germany 7-/-0/20177-/-0/2017,
DOI Open access
Emertlis A, Kelefouras V, Theodoridis G, Nanou M, Politi C, Georgoulakis K & Glentis O (2015) 'FPGA IMPLEMENTATION OF A MIMO DFE IN 40 GB/S DQPSK OPTICAL LINKS' EUSIPCO NICE, FRANCE
Kritikakou A, Catthoor F, Kelefouras V & Goutis C (2015) 'Near-optimal & Scalable Representation of Access Schemes for Memory Management' European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) Amsterdam, The Netherlands
Emeretlis A, Kelefouras V, Theodoridis G & Glentis O (2014) 'EFFICIENT FPGA IMPLEMENTATIONS OF VOLTERRA DFES FOR OPTICAL SYSTEMS' IEEE Dallas Circuits and Systems Conference (DCAS) 0-/-1/20140-/-1/2015
Kritikakou A, Catthoor F, Athanasiou GS, Kelefouras V & Goutis C (2012) 'A template-based methodology for efficient microprocessor and FPGA accelerator co-design' 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII) 7-/-0/20127-/-0/2012IEEE ,
DOI
Michail H, Kelefouras V, Panagianopoulou D, Gregoriades A, Kotsiolis A & Goutis C (2010) 'HW/SW co-Design Integrating High – Speed Authentication Module for IPSec/IPv6' Oral Presentation in the fifth International Conference on Digital Telecommunications (ICDT 2010) Athens/Glyfada Greece
Michail H, Apostolopoulou D, Anastasiou L, Porpodas V, Athanasiou G, Kelefouras V & Goutis C (2009) 'Novel Hardware Implementation of the Cipher Message Authentication Code (CMAC)' Oral Presentation in 1st Panhellenic Conference on Electronics and Telecommunications (PACET '08) Patras Greece
Kokhazadeh M, Keramidas G, Kelefouras V & Stamoulis I 'A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices' International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) Open access